Job Description
Job Title: ASIC Design Verification Engineer.
Location Bay Area
Required Experience: 6+ Years.
Work Authorizations: Preferably GC and US citizens. H1B with sufficient Validity (minimum 1.5+ years).
Contract length – 1.5 years
About the Role:
We are seeking a highly skilled and motivated ASIC Design Verification Engineer with over 6 years of experience in the field of verification. As an Individual Contributor, he/she will play a crucial role in ensuring the quality and reliability of our cutting-edge ASIC designs, contributing to industry-leading innovations.
Key Responsibilities:
* Develop and implement test plans, test cases, and coverage metrics for ASIC verification.
* Perform block-level and chip-level verification
* Proficiency in SystemVerilog and UVM (Universal Verification Methodology).
* Exposure to CPU-based verification techniques is highly desirable.
* Familiarity with Direct Programming Interfaces (DPI) is a plus.
* Strong problem-solving and debugging skills, with a keen attention to detail.